Addressing Capacity
The 8086, 8088, and 80186 have a 20-bit address bus, but the unusual segmented addressing scheme Intel chose for these processors actually produces effective addresses which can have 21 significant bits. This scheme shifts a 16-bit segment number left four bits (making a 20-bit number with four least-significant zeros) before adding to it a 16-bit address offset; the maximum sum occurs when both the segment and offset are hexadecimal FFFF, yielding FFFF0h + FFFFh = 10FFEFh. (The small "h" on the end of each number denotes hexadecimal notation.) On the 8086, 8088, and 80186, the result of an effective address that overflows 20 bits is that the address "wraps around" to the zero end of the address range, i.e. it is taken modulo 2^20 (2^20 = 1048576 = 100000h). However, the 80286 has 24 address bits and computes effective addresses to 24 bits even in real mode. Therefore, for the segment FFFFh and offset greater than 000Fh, the 80286 would actually make an access into the beginning of the second mebibyte of memory, whereas the 80186 and earlier would access an address equal to -10h ( = -16 decimal), which is at the beginning of the first mebibyte. (Note that on the 80186 and earlier, the first kibibyte of the address space, starting at address 0, is the permanent, immovable location of the interrupt vector table.) So, the actual amount of memory addressable by the 80286 and later x86 CPUs in real mode is 1 MiB + 64 KiB – 16 B = 1114096 B.
Read more about this topic: Real Mode
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